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Program Bank Register: Difference between revisions
From SnesLab
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# Figure 2-3-2 Super FX Memory Map on [https://archive.org/details/SNESDevManual/book2/page/n106 page 2-3-4 of Book II] | # Figure 2-3-2 Super FX Memory Map on [https://archive.org/details/SNESDevManual/book2/page/n106 page 2-3-4 of Book II] | ||
# section 3.4 Program Address Space of 65c816 datasheet | # section 3.4 Program Address Space of 65c816 datasheet | ||
# [[Eyes & Lichty]], [https://archive.org/details/0893037893ProgrammingThe65816/page/53 page 53] | |||
[[Category:SNES Hardware]] | [[Category:SNES Hardware]] | ||
[[Category:Registers]] | [[Category:Registers]] | ||
[[Category:Bank Registers]] | [[Category:Bank Registers]] | ||
Revision as of 00:43, 17 August 2024
The Program Bank Register (PBR or K) tells the 65c816 which bank to fetch the next opcode from. It is 8 bits wide and is cleared to zero on reset.[2] PHK pushes it onto the stack, but there is no PLK to pull it.
PBR is affected only by:[4]
Incrementing the program counter past FFFFh does not affect PBR.[4]
There is also a program bank register on the GSU.[1] It can be used to specify any mapped bank address.[3]
See Also
References
- paragraph 4.5 on page 2-4-5 of Book II
- section 2.9 on page 7 of 65c816 datasheet, https://westerndesigncenter.com/wdc/documentation/w65c816s.pdf
- Figure 2-3-2 Super FX Memory Map on page 2-3-4 of Book II
- section 3.4 Program Address Space of 65c816 datasheet
- Eyes & Lichty, page 53