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PLP: Difference between revisions
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=== External Links === | |||
* [[Eyes & Lichty]] page on PLP: https://archive.org/details/0893037893ProgrammingThe65816/page/n512 | |||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category:Inherited from 6502]] | [[Category:Inherited from 6502]] |
Revision as of 22:49, 15 May 2023
PLP (PulL status flags) is a 65x instruction that pulls the 8-bit value at the top of the stack into the status register.
Basic Info | |||||||
---|---|---|---|---|---|---|---|
Addressing Mode | Opcode | Length | Speed | ||||
stack | 28 | 1 byte | 4 cycles |
Flags Clobbered | ||||||||
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N | V | M | X | D | I | Z | C | |