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BIC (Super FX): Difference between revisions
From SnesLab
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'''BIC''' (BIt Clear mask) is a [[Super FX]] instruction. | '''BIC''' (BIt Clear mask) is a [[Super FX]] instruction that performs a logical AND between the [[source register]] and the 1's complement of the operand. The conjunction is stored in the [[destination register]]. | ||
{| class="wikitable" style="float:right;clear:right;width:40%" | {| class="wikitable" style="float:right;clear:right;width:40%" | ||
!colspan="8"|Basic Info | !colspan="8"|Basic Info | ||
|+ | |+ | ||
|'''Addressing Mode''' | |||
|'''Opcode''' | |'''Opcode''' | ||
|'''Length''' | |'''Length''' | ||
Line 10: | Line 11: | ||
|'''Cache Speed''' | |'''Cache Speed''' | ||
|+ | |+ | ||
|implied | |||
|3D7n | |3D7n | ||
|2 bytes | |||
|6 cycles | |||
|6 cycles | |||
|2 cycles | |||
|+ | |||
|immediate | |||
|3F7n | |||
|2 bytes | |2 bytes | ||
|6 cycles | |6 cycles |
Revision as of 03:34, 9 May 2023
BIC (BIt Clear mask) is a Super FX instruction that performs a logical AND between the source register and the 1's complement of the operand. The conjunction is stored in the destination register.
Basic Info | |||||||
---|---|---|---|---|---|---|---|
Addressing Mode | Opcode | Length | ROM Speed | RAM Speed | Cache Speed | ||
implied | 3D7n | 2 bytes | 6 cycles | 6 cycles | 2 cycles | ||
immediate | 3F7n | 2 bytes | 6 cycles | 6 cycles | 2 cycles |
Flags Clobbered | ||||||||
---|---|---|---|---|---|---|---|---|
B | ALT1 | ALT2 | O/V | S | CY | Z | ||
0 | 0 | 0 | . | . |