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PLP: Difference between revisions

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* [[Labiak]] page on PLP: https://archive.org/details/Programming_the_65816/page/n180
* [[Labiak]] page on PLP: https://archive.org/details/Programming_the_65816/page/n180
* [[MCS6500 Manual]] page on PLP: https://archive.org/details/mos_microcomputers_programming_manual/page/n142
* [[MCS6500 Manual]] page on PLP: https://archive.org/details/mos_microcomputers_programming_manual/page/n142
* [[Carr]] page on PLP: https://archive.org/details/6502UsersManual/page/n281


[[Category:ASM]]
[[Category:ASM]]
[[Category:Inherited from 6502]]
[[Category:Inherited from 6502]]

Revision as of 04:33, 16 May 2023

PLP (PulL status flags) is a 65x instruction that pulls the 8-bit value at the top of the stack into the status register.

Basic Info
Addressing Mode Opcode Length Speed
stack 28 1 byte 4 cycles
Flags Clobbered
N V M X D I Z C

External Links