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STP: Difference between revisions

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'''STP''' (SToP-the-clock)[1] is an instruction that halts the CPU, putting it into a low power state until it is reset.  The [[PHI2]] clock is held high.
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'''STP''' (SToP-the-clock)[1] is an instruction that halts the CPU, putting it into a low power state until it is reset.  The [[PHI2]] clock is held high.


[[Category: ASM]]
[[Category: ASM]]

Revision as of 17:51, 13 July 2023

Basic Info
Addressing Mode Opcode Length Speed
implied DB 1 byte 3 cycles
Flags Clobbered
N V M X D I Z C
. . . . . . . .

STP (SToP-the-clock)[1] is an instruction that halts the CPU, putting it into a low power state until it is reset. The PHI2 clock is held high.

External Links

References