DBNZ (SPC700): Difference between revisions

Revision as of 03:14, 13 July 2023

DBNZ is an SPC700 instruction that decrements memory or the Y index register and then jumps if that value is nonzero.


Basic Info
Addressing Mode	Opcode	Length	Speed
	6E	3 bytes	when condition is false: 5 cycles when condition is true: 7 cycles
	FE	2 bytes	when condition is false: 4 cycles when condition is true: 6 cycles


Flags Affected
N	V	P	B	H	I	Z	C
.	.	.	.	.	.	.	.

@@ Line 1: / Line 1: @@
 '''DBNZ''' is an [[SPC700]] instruction that decrements memory or the [[Y index register]] and then jumps if that value is nonzero.
-{| class="wikitable" style="float:right;clear:right;width:30%"
+{| class="wikitable" style="float:right;clear:right;width:40%"
 !colspan="8"|Basic Info
 |+
@@ Line 12: / Line 12: @@
 |6E
 |3 bytes
-|5 or 7 cycles
+|when condition is false: 5 cycles
+when condition is true: 7 cycles
 |+
 |
 |FE
 |2 bytes
-|4 or 6 cycles
+|when condition is false: 4 cycles
+when condition is true: 6 cycles
 |}