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TSET1 (SPC700): Difference between revisions
From SnesLab
(→See Also: SET1) |
(→See Also: TSB) |
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* [[TCLR1]] | * [[TCLR1]] | ||
* [[SET1]] | * [[SET1]] | ||
* [[TSB]] | |||
=== External Links === | === External Links === | ||
Revision as of 17:31, 23 July 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| absolute | 0E | 3 byte | 6 cycles | ||||
| Flags Clobbered | |||||||
|---|---|---|---|---|---|---|---|
| N | V | P | B | H | I | Z | C |
| . | . | . | . | . | . | ||
TSET1 is an SPC700 instruction that tests and sets bits with the accumulator.
See Also
External Links
- Official Super Nintendo development manual on TSET1: Appendix C-9 of Book I