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MUL (SPC700): Difference between revisions
From SnesLab
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=== See Also === | === See Also === | ||
* [[DIV]] | * [[DIV]] | ||
* [[ADC (SPC700)]] | |||
* [[SBC (SPC700)]] | |||
=== External Links === | === External Links === |
Revision as of 05:48, 28 November 2023
Basic Info | |||||||
---|---|---|---|---|---|---|---|
Addressing Mode | Opcode | Length | Speed | ||||
Implied (type 1) | CF | 1 byte | 9 cycles |
Flags Affected | |||||||
---|---|---|---|---|---|---|---|
N | V | P | B | H | I | Z | C |
. | . | . | . | . | . |
MUL is an SPC700 instruction that multiplies the value in the Y index register by the value in the accumulator and stores the product in YA. The high byte of the product is stored in Y and the low byte is stored in A.[2]
See Also
External Links
- Official Super Nintendo development manual on MUL: Appendix C-8 of Book I
- https://forums.nesdev.org/viewtopic.php?p=141221#p141221