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Direct Page Register: Difference between revisions
From SnesLab
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The '''Direct Page Register''' exists on the [[65c816]] and is 16 bits wide.<sup>[1]</sup> | The '''Direct Page Register''' exists on the [[65c816]] and is 16 bits wide.<sup>[1]</sup> | ||
The direct page register is cleared to point to the [[zero page]] on | The direct page register is cleared to point to the [[zero page]] on reset. | ||
=== See Also === | === See Also === | ||
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=== References === | === References === | ||
# page 5 of the official 65c816 datasheet: https://www.westerndesigncenter.com/wdc/documentation/w65c816s.pdf | # page 5 of the official 65c816 datasheet: https://www.westerndesigncenter.com/wdc/documentation/w65c816s.pdf | ||
# page 7, lbid. | |||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category:Registers]] | [[Category:Registers]] | ||
[[Category:65c816 additions]] | [[Category:65c816 additions]] | ||
Revision as of 07:43, 19 December 2023
The Direct Page Register exists on the 65c816 and is 16 bits wide.[1]
The direct page register is cleared to point to the zero page on reset.
See Also
References
- page 5 of the official 65c816 datasheet: https://www.westerndesigncenter.com/wdc/documentation/w65c816s.pdf
- page 7, lbid.