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MUL (SPC700): Difference between revisions
From SnesLab
(→External Links: Table C-13) |
(→See Also: MULT) |
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* [[ADC (SPC700)]] | * [[ADC (SPC700)]] | ||
* [[SBC (SPC700)]] | * [[SBC (SPC700)]] | ||
* [[MULT]] | |||
=== External Links === | === External Links === | ||
Revision as of 12:22, 22 December 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Implied (type 1) | CF | 1 byte | 9 cycles | ||||
| Flags Affected | |||||||
|---|---|---|---|---|---|---|---|
| N | V | P | B | H | I | Z | C |
| . | . | . | . | . | . | ||
MUL is an SPC700 instruction that multiplies the value in the Y index register by the value in the accumulator and stores the product in YA. The high byte of the product is stored in Y and the low byte is stored in A.[2]
See Also
External Links
- Official Super Nintendo development manual on MUL: Table C-13, Appendix C-8 of Book I
- https://forums.nesdev.org/viewtopic.php?p=141221#p141221