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AND (Super FX): Difference between revisions
From SnesLab
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=== External Links === | === External Links === | ||
* Official Nintendo documentation on AND: [https://archive.org/details/SNESDevManual/book2/page/n166 Page 2-9-10 of Book II] | * Official Nintendo documentation on AND: [https://archive.org/details/SNESDevManual/book2/page/n166 Page 2-9-10 of Book II] | ||
* AND with immediate addressing: [https://archive.org/details/SNESDevManual/book2/page/n167 Page 2-9-11 of Book II] | |||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category:Super FX]] | [[Category:Super FX]] | ||
[[Category:Logical Operation Instructions]] | [[Category:Logical Operation Instructions]] |
Revision as of 21:53, 29 June 2024
Basic Info | |||||||
---|---|---|---|---|---|---|---|
Addressing Mode | Opcode | Length | ROM Speed | RAM Speed | Cache Speed | ||
Immediate | 3E7n | 2 bytes | 6 cycles | 6 cycles | 2 cycles | ||
Implied | 7n | 1 byte | 3 cycles | 3 cycles | 1 cycle |
Flags Affected | ||||||||
---|---|---|---|---|---|---|---|---|
B | ALT1 | ALT2 | O/V | S | CY | Z | ||
0 | 0 | 0 | . | . |
AND is a Super FX instruction that performs a logical AND on the source register and Rn. The conjunction is stored in the destination register. The operand may not be R0.
See Also
External Links
- Official Nintendo documentation on AND: Page 2-9-10 of Book II
- AND with immediate addressing: Page 2-9-11 of Book II