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MULT (Super FX): Difference between revisions
From SnesLab
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MULT utilizes the 8-bit multiplier only once, so it is fast.<sup>[2]</sup> | MULT utilizes the 8-bit multiplier only once, so it is fast.<sup>[2]</sup> | ||
The exact number of cycles depends on the state of the [[CFGR]] register. | |||
=== See Also === | === See Also === |
Revision as of 00:26, 2 July 2024
Basic Info | |||||||
---|---|---|---|---|---|---|---|
Addressing Mode | Opcode | Length | ROM Speed | RAM Speed | Cache Speed | ||
Implied | 8n | 1 byte | 3 or 5 cycles | 3 or 5 cycles | 1 or 2 cycles | ||
Immediate | 3E8n | 2 bytes | 6 or 8 cycles | 6 or 8 cycles | 2 or 3 cycles |
Flags Affected | ||||||||
---|---|---|---|---|---|---|---|---|
B | ALT1 | ALT2 | O/V | S | CY | Z | ||
0 | 0 | 0 | . | . |
MULT is a Super FX instruction that performs a signed multiplication. The product is stored in the destination register.
MULT utilizes the 8-bit multiplier only once, so it is fast.[2]
The exact number of cycles depends on the state of the CFGR register.
See Also
External Links
- Official Nintendo documentation on MULT: 9.66 on Page 2-9-93 of Book II
- page 2-8-16 of Book II, lbid.