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LSR (Super FX): Difference between revisions
From SnesLab
(→External Links: 9.55) |
(type 1 implied) |
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|'''Cache Speed''' | |'''Cache Speed''' | ||
|+ | |+ | ||
|[[Implied]] | |[[Implied]] (type 1) | ||
|03 | |03 | ||
|1 byte | |1 byte | ||
Revision as of 06:06, 2 July 2024
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | ROM Speed | RAM Speed | Cache Speed | ||
| Implied (type 1) | 03 | 1 byte | 3 cycles | 3 cycles | 1 cycle | ||
| Flags Affected | ||||||||
|---|---|---|---|---|---|---|---|---|
| B | ALT1 | ALT2 | O/V | S | CY | Z | ||
| 0 | 0 | 0 | . | 0 | ||||
LSR (Logical Shift Right) is a Super FX instruction that shifts all bits of the source register's value to the right one bit while shifting a zero into the most significant bit, storing the result in the destination register. Bit 0 is shifted into CY. The source register itself is left unchanged.
See Also
External Links
- Official Nintendo documentation on LSR: 9.55 on Page 2-9-78 of Book II