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Program Bank Register: Difference between revisions
From SnesLab
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* [[Program Counter]] | * [[Program Counter]] | ||
* [[Data Bank Register]] | * [[Data Bank Register]] | ||
* [[LJMP]] | |||
=== Reference === | === Reference === |
Revision as of 21:14, 2 July 2024
The Program Bank Register (PBR) exists on the 65c816. It is 8 bits wide. It is cleared to zero on reset.[2] PHK pushes it onto the stack.
There is also a program bank register on the GSU.[1]
See Also
Reference
- paragraph 4.5 on page 2-4-5 of Book II
- section 2.9 on page 7 of 65c816 datasheet, https://westerndesigncenter.com/wdc/documentation/w65c816s.pdf