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FastROM: Difference between revisions
From SnesLab
(6 CPU cycles per master clock cycle) |
(SAS cannot use fastrom) |
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FastROM speeds only apply to the upper halves of banks $80-bf and all of banks $c0-ff.<sup>[1]</sup> | FastROM speeds only apply to the upper halves of banks $80-bf and all of banks $c0-ff.<sup>[1]</sup> | ||
The SAS cannot use FastROM.<sup>[3]</sup> | |||
=== See Also === | === See Also === | ||
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# Near, https://forums.nesdev.org/viewtopic.php?t=9585 | # Near, https://forums.nesdev.org/viewtopic.php?t=9585 | ||
# Bregalad, lbid. | # Bregalad, lbid. | ||
# caution 3.3.6.1 on page 1-3-4 of Book II of the official Super Nintendo development manual | |||
[[Category:SNES Hardware]] | [[Category:SNES Hardware]] | ||
[[Category:Scene Slang]] | [[Category:Scene Slang]] | ||
Revision as of 19:03, 7 July 2024
FastROM is 3.58 MHz. It is about 33% faster than SlowROM. FastROM is a property of the ROM chip itself and not the board it is soldered onto.[2] When the 5A22 is operating at fastROM, there are 6 CPU cycles per master clock cycle.
FastROM speeds only apply to the upper halves of banks $80-bf and all of banks $c0-ff.[1]
The SAS cannot use FastROM.[3]
See Also
External Links
- https://gbatemp.net/threads/romhacker-kandowontu-converts-more-than-80-snes-titles-into-fastrom-improving-their-performance.629133
- "High Speed Required?" checkbox on page 1-2-9 of Book I of the official Super Nintendo development manual
References
- Near, https://forums.nesdev.org/viewtopic.php?t=9585
- Bregalad, lbid.
- caution 3.3.6.1 on page 1-3-4 of Book II of the official Super Nintendo development manual