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XCE: Difference between revisions

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'''XCE''' is a [[65c816]] instruction  
'''XCE''' is a [[65c816]] instruction  
that exchanges the [[carry]] and [[Emulation Mode Flag|emulation]] bits.  It typically appears soon after the [[Reset Vector]] following a [[CLC]], to switch the [[S-CPU]] into [[65c816 native mode]].
that exchanges the [[carry]] and [[Emulation Mode Flag|emulation]] bits.  It typically appears soon after the [[Reset Vector]] following a [[CLC]], to switch the [[S-CPU]] into [[65c816 native mode]]. The carry flag was chosen because:
 
* it is easy to set and clear
* it is used less frequently than the negative and zero flags
* it can be tested with [[BCC]] and [[BCS]]


==== Syntax ====
==== Syntax ====

Revision as of 16:24, 9 July 2024

Basic Info
Addressing Mode Opcode Length Speed
Implied (type 2) FB 1 byte 2 cycles
Flags Affected
N V M X D I Z C E
. . . . .

XCE is a 65c816 instruction that exchanges the carry and emulation bits. It typically appears soon after the Reset Vector following a CLC, to switch the S-CPU into 65c816 native mode. The carry flag was chosen because:

  • it is easy to set and clear
  • it is used less frequently than the negative and zero flags
  • it can be tested with BCC and BCS

Syntax

XCE

Examples

Switching to native mode:

CLC
XCE

Switching to emulation mode:

SEC
XCE

See Also

External Links