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OR (Super FX): Difference between revisions

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(which example)
(→‎Example 1: added binary)
Line 58: Line 58:
  S<sub>reg</sub> : R<sub>4</sub>
  S<sub>reg</sub> : R<sub>4</sub>
  D<sub>reg</sub> : R<sub>5</sub>
  D<sub>reg</sub> : R<sub>5</sub>
  R<sub>4</sub> = 6368h
  R<sub>4</sub> = 6368h (0110 0011 0110 1000b)
  R<sub>2</sub> = 168ch
  R<sub>2</sub> = 168ch
After executing OR R<sub>2</sub>:
After executing OR R<sub>2</sub>:

Revision as of 22:31, 9 July 2024

Basic Info
Addressing Mode Opcode Length ROM Speed RAM Speed Cache Speed
Immediate 3ECn 2 bytes 6 cycles 6 cycles 2 cycle
Implied (type 1) Cn 1 byte 3 cycles 3 cycles 1 cycle
Flags Affected
B ALT1 ALT2 O/V S CY Z
0 0 0 . .

OR is a Super FX instruction that performs a logical bitwise OR between the source register and its operand. The disjunction is stored in the destination register. The operand may be any register from R1 to R15 or any immediate value from 1 to 15.

The source and destination registers should be specified in advance using WITH, FROM, or TO. Otherwise, R0 serves as the default.

Syntax

OR Rn
OR #n

Example 1

Let:

Sreg : R4
Dreg : R5
R4 = 6368h (0110 0011 0110 1000b)
R2 = 168ch

After executing OR R2:

R5 = 77ech

Example 2

Let:

Sreg : R7
Dreg : R5
R7 = 5fa2h

After executing OR #5h:

R5 = 5fa7h

See Also

External Links