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PLY: Difference between revisions

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=== See Also ===
=== See Also ===
* [[PHY]]
* [[PLX]]
* [[PLX]]
* [[PLA]]
* [[PLA]]

Revision as of 18:59, 14 July 2024

Basic Info
Addressing Mode Opcode Length Speed
Stack (Pull) 7A 1 byte 4 cycles*
Flags Affected
N V M X D I Z C
. . . . . .

PLY (PulL Y) is a 65x instruction that pulls the value at the top of the stack into the Y index register. PLY increments the stack pointer before the pull.

Syntax

PLY
Cycle Penalty
  • PLY takes one additional cycle if the index registers are 16 bits wide.

See Also

External Links