We've just updated MediaWiki and its underlying software. If anything doesn't look or work quite right, please mention it to us. --RanAS

CLD: Difference between revisions

From SnesLab
Jump to: navigation, search
(mention ADC and SBC)
(→‎See Also: CLC, CLV)
Line 45: Line 45:
* [[SED]]
* [[SED]]
* [[BCD]]
* [[BCD]]
* [[CLC]]
* [[CLV]]


=== External Links ===
=== External Links ===

Revision as of 12:03, 15 July 2024

Basic Info
Addressing Mode Opcode Length Speed
Implied (type 2) D8 1 byte 2 cycles
Flags Affected
N V M X D I Z C
. . . . 0 . . .

CLD is a 65x instruction that clears the decimal mode flag, switching the processor back into binary mode so ADC and SBC will operate normally.

Syntax

CLD

See Also

External Links