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Program Bank Register: Difference between revisions
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The '''Program Bank Register''' (PBR or K) exists on the [[65c816]]. It is 8 bits wide. It is cleared to zero on reset.<sup>[2]</sup> [[PHK]] pushes it onto the [[stack]]. | The '''Program Bank Register''' (PBR or K) exists on the [[65c816]]. It is 8 bits wide. It is cleared to zero on reset.<sup>[2]</sup> [[PHK]] pushes it onto the [[stack]]. | ||
There is also a program bank register on the [[GSU]].<sup>[1]</sup> | There is also a program bank register on the [[GSU]].<sup>[1]</sup> It can be used to specify any mapped bank address.<sup>[3]</sup> | ||
=== See Also === | === See Also === | ||
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# paragraph 4.5 on [https://archive.org/details/SNESDevManual/book2/page/n111 page 2-4-5 of Book II] | # paragraph 4.5 on [https://archive.org/details/SNESDevManual/book2/page/n111 page 2-4-5 of Book II] | ||
# section 2.9 on page 7 of 65c816 datasheet, https://westerndesigncenter.com/wdc/documentation/w65c816s.pdf | # section 2.9 on page 7 of 65c816 datasheet, https://westerndesigncenter.com/wdc/documentation/w65c816s.pdf | ||
# Figure 2-3-2 Super FX Memory Map on page 2-3-4 of Book II | |||
[[Category:SNES Hardware]] | [[Category:SNES Hardware]] | ||
[[Category:Registers]] | [[Category:Registers]] | ||
Revision as of 01:21, 16 July 2024
The Program Bank Register (PBR or K) exists on the 65c816. It is 8 bits wide. It is cleared to zero on reset.[2] PHK pushes it onto the stack.
There is also a program bank register on the GSU.[1] It can be used to specify any mapped bank address.[3]
See Also
Reference
- paragraph 4.5 on page 2-4-5 of Book II
- section 2.9 on page 7 of 65c816 datasheet, https://westerndesigncenter.com/wdc/documentation/w65c816s.pdf
- Figure 2-3-2 Super FX Memory Map on page 2-3-4 of Book II