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Break Flag: Difference between revisions
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The '''Break Flag''' (B) exists on the [[SPC700]], as bit 4 of the [[Program Status Word]]. It discerns between [[IRQ]]s and [[BRK]]. | The '''Break Flag''' (B) exists on the [[SPC700]], as bit 4 of the [[Program Status Word]]. It discerns between [[IRQ]]s and [[BRK]]. | ||
BRK and [[PHP]] set the break flag. IRQs, [[NMI]]s, and reset clear it.<sup>[1]</sup> | BRK and [[PHP]]<sup>[dubious]</sup> set the break flag. IRQs, [[NMI]]s, and reset clear it.<sup>[1]</sup> | ||
In [[emulation mode]] the [[65c816]] has a break flag too.<sup>[2]</sup> But in native mode it becomes the [[Index Register Select]]. [[PLP]] can affect the break flag.<sup>[3]</sup> | In [[emulation mode]] the [[65c816]] has a break flag too.<sup>[2]</sup> But in native mode it becomes the [[Index Register Select]]. [[PLP]] can affect the break flag.<sup>[3]</sup> | ||
Revision as of 00:27, 22 July 2024
Note: This page may be confusing or inaccurate. See the talk page.
The Break Flag (B) exists on the SPC700, as bit 4 of the Program Status Word. It discerns between IRQs and BRK.
BRK and PHP[dubious] set the break flag. IRQs, NMIs, and reset clear it.[1]
In emulation mode the 65c816 has a break flag too.[2] But in native mode it becomes the Index Register Select. PLP can affect the break flag.[3]
See Also
References
- https://problemkaputt.de/fullsnes.htm#cpuregistersandflags
- Eyes & Lichty, page 422, Table 18.2. 65x Flags. https://archive.org/details/0893037893ProgrammingThe65816/page/422
- page 486, lbid.