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PLP: Difference between revisions

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* [[Leventhal]] page 3-84 on PLP: https://archive.org/details/6502-assembly-language-programming/page/n133
* [[Leventhal]] page 3-84 on PLP: https://archive.org/details/6502-assembly-language-programming/page/n133
* snes9x implementation of PLP: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2099
* snes9x implementation of PLP: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L2099
* Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#6.8.3


[[Category:ASM]]
[[Category:ASM]]

Revision as of 02:31, 24 July 2024

Basic Info
Addressing Mode Opcode Length Speed
Stack (Pull) 28 1 byte 4 cycles
Flags Affected
N V M X / B D I Z C
65c816 native mode
6502 emulation mode .

PLP (PulL status flags) is a 65x instruction that pulls the 8-bit value at the top of the stack into the status register. The stack pointer is incremented before the byte is pulled.

Syntax

PLP

See Also

External Links