We've just updated MediaWiki and its underlying software. If anything doesn't look or work quite right, please mention it to us. --RanAS
Control Register: Difference between revisions
From SnesLab
(bits cleared upon reset) |
(shorten description) |
||
| Line 1: | Line 1: | ||
The '''Control Register''' | The '''Control Register''' is 8 bits wide on the [[S-SMP]] and lives at 00F1h. Bits 0 to 5 are cleared upon reset. | ||
=== See Also === | === See Also === | ||
Revision as of 13:56, 12 August 2024
The Control Register is 8 bits wide on the S-SMP and lives at 00F1h. Bits 0 to 5 are cleared upon reset.
See Also
Reference
- page 3-4-1 of Book II of the official Super Nintendo development manual