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Machine Cycle: Difference between revisions

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(how many master clock cycles)
(see also STP)
Line 5: Line 5:
* [[FastROM]]
* [[FastROM]]
* [[SlowROM]]
* [[SlowROM]]
* [[STP]]


=== References ===
=== References ===

Revision as of 00:46, 18 August 2024

A Machine Cycle is one tick of the 5A22. It may be 6, 8, or 12 master clock cycles.

See Also

References