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Indirect Addressing: Difference between revisions

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(table name; added opcodes)
(accumulator usually first operand)
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'''Indirect Addressing''' is supported by some one-byte [[SPC700]] instructions when the [[accumulator]] is one of the operands, such as:
'''Indirect Addressing''' is supported by some one-byte [[SPC700]] instructions when the [[accumulator]] is usually the first operand in the assembler source:


* [[MOV]] (opcodes E6 and C6)
* [[MOV]] (opcodes E6 and C6)
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* [[SBC]] (opcode A6)
* [[SBC]] (opcode A6)
* [[CMP]] (opcode 66)
* [[CMP]] (opcode 66)
In the above list, MOV is the only mnemonic that can take the accumulator as the second operand.


Some of the above mnemonics have an opcode where both operands utilize indirect addressing, in which case the whole instruction is considered to use [[Indirect Page to I.P. Addressing]].
Some of the above mnemonics have an opcode where both operands utilize indirect addressing, in which case the whole instruction is considered to use [[Indirect Page to I.P. Addressing]].

Revision as of 04:16, 5 January 2025

Indirect Addressing is supported by some one-byte SPC700 instructions when the accumulator is usually the first operand in the assembler source:

  • MOV (opcodes E6 and C6)
  • AND (opcode 26)
  • OR (opcode 06)
  • EOR (opcode 46)
  • ADC (opcode 86)
  • SBC (opcode A6)
  • CMP (opcode 66)

In the above list, MOV is the only mnemonic that can take the accumulator as the second operand.

Some of the above mnemonics have an opcode where both operands utilize indirect addressing, in which case the whole instruction is considered to use Indirect Page to I.P. Addressing.

Symbol

(X)

See Also

References