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Indirect Addressing: Difference between revisions
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'''Indirect Addressing''' is supported by some one-byte [[SPC700]] instructions when the [[accumulator]] is usually the first operand in the assembler source: | '''Indirect Addressing''' is supported by some one-byte [[SPC700]] instructions when the [[accumulator]] is usually the first operand in the assembler source and the other operand is the [[X index register]], which is interpreted as a pointer: | ||
* [[MOV]] (opcodes E6 and C6) | * [[MOV]] (opcodes E6 and C6) | ||
Revision as of 04:21, 5 January 2025
Indirect Addressing is supported by some one-byte SPC700 instructions when the accumulator is usually the first operand in the assembler source and the other operand is the X index register, which is interpreted as a pointer:
- MOV (opcodes E6 and C6)
- AND (opcode 26)
- OR (opcode 06)
- EOR (opcode 46)
- ADC (opcode 86)
- SBC (opcode A6)
- CMP (opcode 66)
In the above list, MOV is the only mnemonic that can take the accumulator as the second operand.
Some of the above mnemonics have an opcode where both operands utilize indirect addressing, in which case the whole instruction is considered to use Indirect Page to I.P. Addressing.
Symbol
(X)
See Also
- Absolute Indirect Addressing
- Absolute Indirect Long Addressing
- Direct Page Indirect Addressing
- Direct Page Indirect Indexed, Y Addressing
- Direct Page Indirect Long Addressing
- Direct Page Indirect Long Indexed, Y Addressing
References
- Figure 3-8-3 Memory Access Addressing Effective Address on page 3-8-9 of Book I of the official Super Nintendo development manual
- Eyes & Lichty, page 37