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PLP: Difference between revisions
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Revision as of 19:03, 4 May 2023
PLP (PulL status flags) is a 65x instruction that pulls the 8-bit value at the top of the stack into the status register.
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| stack | 28 | 1 byte | 4 cycles | ||||
| Flags Clobbered | ||||||||
|---|---|---|---|---|---|---|---|---|
| N | V | M | X | D | I | Z | C | |