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OR1 (SPC700): Difference between revisions
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'''OR1''' is an [[SPC700]] instruction that performs a logical or | '''OR1''' is an [[SPC700]] instruction that performs a logical or between a memory bit and the [[carry flag]], then stores the disjunction in the carry flag. | ||
{| class="wikitable" style="float:right;clear:right;width:30%" | {| class="wikitable" style="float:right;clear:right;width:30%" | ||
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|+ | |+ | ||
| | | | ||
|0A | |||
|3 bytes | |||
|5 cycles | |||
|+ | |||
| | | | ||
| | |2A | ||
| | |3 bytes | ||
|5 cycles | |||
|} | |} | ||
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=== See Also === | === See Also === | ||
* [[AND1]] | * [[AND1]] | ||
* [[EOR1]] | |||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category:SPC700]] | [[Category:SPC700]] |
Revision as of 05:01, 7 May 2023
OR1 is an SPC700 instruction that performs a logical or between a memory bit and the carry flag, then stores the disjunction in the carry flag.
Basic Info | |||||||
---|---|---|---|---|---|---|---|
Addressing Mode | Opcode | Length | Speed | ||||
0A | 3 bytes | 5 cycles | |||||
2A | 3 bytes | 5 cycles |
Flags Clobbered | |||||||
---|---|---|---|---|---|---|---|
N | V | P | B | H | I | Z | C |
. | . | . | . | . | . | . |