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Megaboys Manual: Difference between revisions
From SnesLab
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* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX01_SOFTWARE_MANUAL/page/n43 Programming Warnings] | * [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX01_SOFTWARE_MANUAL/page/n43 Programming Warnings] | ||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX01_SOFTWARE_MANUAL/page/n44 Register Clear (Initial Settings)] | * [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX01_SOFTWARE_MANUAL/page/n44 Register Clear (Initial Settings)] | ||
==== SFX02, Register (PPU): https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/ | ==== [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/mode/2up SFX02, Register (PPU)] ==== | ||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/page/n1 INIDISP / OBJSEL] - page 46 | |||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/page/n2 OAMADDL / OAMADDH / OAM DATA] - page 47 | |||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/page/n3 BGMODE / MOSAIC] - page 48 | |||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/page/n4 BG1SC / BG2SC / BG3SC / BG4SC] - page 49 | |||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/page/n5 BG12NBA / BG34NBA / BG1HOFS BG1VOFS] - page 50 | |||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/page/n6 BG2HOFS / BG2VOFS / BG3HOFS / BG3VOFS / BG4HOFS / BG3VOFS / VMAINC] - page 51 | |||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/page/n7 VMADDL / VMADDH / VMDATAL / VMDATAH] - page 52 | |||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/page/n8 M7SEL] - page 53 | |||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/page/n9 M7A / M7B / M7C / M7D / M7X / M7Y] - page 54 | |||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/page/n10 CGADD / CGDATA] - page 55 | |||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/page/n11 W12SEL / W34SEL / WOBJSEL / WH0 / WH1 / WH2 / WH3] - page 56 | |||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/page/n12 WBLOG / WOBJLOG] - page 57 | |||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/page/n13 TM / TS] - page 58 | |||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/page/n14 TMW / TSW] - page 59 | |||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/page/n15 CGWSEL / CGADSUB] - page 60 | |||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/page/n16 COLDATA / SETINI] - page 61 | |||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/page/n17 MPYL / MPYM / PYH / SLHV] - page 62 | |||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/page/n18 OAMDATA / VMDATAL / VMDATAH] - page 63 | |||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/page/n19 CGDATA / OPHCT / OPVCT] - page 64 | |||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/page/n20 STAT77 / STAT78] - page 65 | |||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/page/n21 APUIO0 / APUIO1 / APUIO2 / APUIO3] | |||
* [https://archive.org/details/SFX01SOFTWAREMANUAL/SFX02_REGISTER%28PPU%29/page/n22 Appendix] - page 66 | |||
==== SFX03, Register (CPU): https://archive.org/details/SFX01SOFTWAREMANUAL/SFX03_REGISTER%28CPU%29/mode/2up ==== | ==== SFX03, Register (CPU): https://archive.org/details/SFX01SOFTWAREMANUAL/SFX03_REGISTER%28CPU%29/mode/2up ==== | ||
==== Summary of Registers: https://archive.org/details/SFX01SOFTWAREMANUAL/SFX_SUMMARY_OF_REGISTERS ==== | ==== Summary of Registers: https://archive.org/details/SFX01SOFTWAREMANUAL/SFX_SUMMARY_OF_REGISTERS ==== | ||
[[Category:Books]] | [[Category:Books]] | ||
Revision as of 07:40, 23 May 2023
The Super Famicom documentation, scanned by Optiroc of Megaboys.
SFX01, Software Manual
- Contents
- Introduction
- OBJ (Object)
- BG (Background)
- Mosaic
- Rotation/Enlargement/Reduction (BG Mode 7)
- Window (Window Mask)
- Main / Sub Screen
- Screen Addition / Subtraction
- Color Constant Addition/Subtraction
- Color Window
- CG Direct Select
- H-Psuedo 512
- Complementary Multiplication (Signed Multiplication)
- H/V Counter Latch
- Offset Change
- Joy Controller
- Programmable I/O Port
- Absolute Multiplication/Divide
- H/V Count Timer
- DMA (Direct Memory Access)
- General Purpose DMA
- H-DMA
- Interlace
- H- 512 Mode (BG Mode 5 & 6)
- OBJ 33's Lines Over & Priority Order
- CPU Clock & Address Map
- Hardware Configuration
- System Flowchart
- Programming Warnings
- Register Clear (Initial Settings)
SFX02, Register (PPU)
- INIDISP / OBJSEL - page 46
- OAMADDL / OAMADDH / OAM DATA - page 47
- BGMODE / MOSAIC - page 48
- BG1SC / BG2SC / BG3SC / BG4SC - page 49
- BG12NBA / BG34NBA / BG1HOFS BG1VOFS - page 50
- BG2HOFS / BG2VOFS / BG3HOFS / BG3VOFS / BG4HOFS / BG3VOFS / VMAINC - page 51
- VMADDL / VMADDH / VMDATAL / VMDATAH - page 52
- M7SEL - page 53
- M7A / M7B / M7C / M7D / M7X / M7Y - page 54
- CGADD / CGDATA - page 55
- W12SEL / W34SEL / WOBJSEL / WH0 / WH1 / WH2 / WH3 - page 56
- WBLOG / WOBJLOG - page 57
- TM / TS - page 58
- TMW / TSW - page 59
- CGWSEL / CGADSUB - page 60
- COLDATA / SETINI - page 61
- MPYL / MPYM / PYH / SLHV - page 62
- OAMDATA / VMDATAL / VMDATAH - page 63
- CGDATA / OPHCT / OPVCT - page 64
- STAT77 / STAT78 - page 65
- APUIO0 / APUIO1 / APUIO2 / APUIO3
- Appendix - page 66