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AND (SPC700): Difference between revisions
From SnesLab
(→See Also: OR, EOR) |
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Revision as of 05:29, 23 July 2023
Basic Info | |||||||
---|---|---|---|---|---|---|---|
Addressing Mode | Opcode | Length | Speed | ||||
28 | 2 bytes | 2 cycles | |||||
26 | 1 byte | 3 cycles | |||||
24 | 2 bytes | 3 cycles | |||||
34 | 2 bytes | 4 cycles | |||||
25 | 3 bytes | 4 cycles | |||||
35 | 3 bytes | 5 cycles | |||||
36 | 3 bytes | 5 cycles | |||||
27 | 2 bytes | 6 cycles | |||||
37 | 2 bytes | 6 cycles | |||||
39 | 1 bytes | 5 cycles | |||||
29 | 3 bytes | 6 cycles | |||||
38 | 3 bytes | 5 cycles |
Flags Affected | |||||||
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N | V | P | B | H | I | Z | C |
. | . | . | . | . | . |
AND is an SPC700 instruction that performs a logical conjunction.
See Also
External Links
- Official Super Nintendo development manual on AND: Appendix C-6 of Book I