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NOT1 (SPC700): Difference between revisions
From SnesLab
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(→See Also: OR1, AND1, EOR1) |
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=== See Also === | === See Also === | ||
* [[NOTC]] | * [[NOTC]] | ||
* [[OR1]] | |||
* [[AND1]] | |||
* [[EOR1]] | |||
=== External Links === | === External Links === | ||
Revision as of 18:15, 23 July 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| implied | EA | 3 byte | 5 cycles | ||||
| Flags Clobbered | |||||||
|---|---|---|---|---|---|---|---|
| N | V | P | B | H | I | Z | C |
| . | . | . | . | . | . | . | . |
NOT1 is an SPC700 instruction that performs a complement of a bit. The low 13 bits of the operand specify an absolute address. The high 3 bits of the operand specify which bit at that absolute address.
See Also
External Links
- Official Nintendo documentation on NOT1: Appendix C-9 of Book I