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CMP (SPC700): Difference between revisions

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Line 7: Line 7:
|'''Speed'''
|'''Speed'''
|+
|+
|immediate
|[[Immediate Addressing | Immediate]]
|68
|68
|2 bytes
|2 bytes
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|3 cycles
|3 cycles
|+
|+
|
|[[Direct Page Indexed by X]]
|74
|74
|2 bytes
|2 bytes
Line 67: Line 67:
|5 cycles
|5 cycles
|+
|+
|
|[[Immediate Addressing | Immediate]]
|C8
|C8
|2 bytes
|2 bytes
|2 cycles
|2 cycles
|+
|+
|
|[[Direct Page Addressing | Direct Page]]
|3E
|3E
|2 bytes
|2 bytes
|3 cycles
|3 cycles
|+
|+
|
|[[Absolute Addressing | Absolute]]
|1E
|1E
|3 bytes
|3 bytes
|4 cycles
|4 cycles
|+
|+
|
|[[Immediate Addressing | Immediate]]
|AD
|AD
|2 bytes
|2 bytes
|2 cycles
|2 cycles
|+
|+
|
|[[Direct Page Addressing | Direct Page]]
|7E
|7E
|2 bytes
|2 bytes
|3 cycles
|3 cycles
|+
|+
|
|[[Absolute Addressing | Absolute]]
|5E
|5E
|3 bytes
|3 bytes

Revision as of 03:49, 24 July 2023

Basic Info
Addressing Mode Opcode Length Speed
Immediate 68 2 bytes 2 cycles
66 1 bytes 3 cycles
64 2 bytes 3 cycles
Direct Page Indexed by X 74 2 bytes 4 cycles
Absolute 65 3 bytes 4 cycles
Absolute Indexed by X 75 3 bytes 5 cycles
Absolute Indexed by Y 76 3 bytes 5 cycles
67 2 byte 6 cycles
77 2 bytes 6 cycles
79 1 bytes 5 cycles
69 3 bytes 6 cycles
78 3 bytes 5 cycles
Immediate C8 2 bytes 2 cycles
Direct Page 3E 2 bytes 3 cycles
Absolute 1E 3 bytes 4 cycles
Immediate AD 2 bytes 2 cycles
Direct Page 7E 2 bytes 3 cycles
Absolute 5E 3 bytes 4 cycles
Flags Affected
N V P B H I Z C
. . . . .

CMP is an SPC700 instruction that compares two operands. The right operand is subtracted from the left operand, but the difference is not stored anywhere - the side effect is the N, Z, and C flags being modified.

See Also

External Links