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TSET1 (SPC700)

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Basic Info
Addressing Mode Opcode Length Speed
Absolute 0E 3 bytes 6 cycles
Flags Affected
N V P B H I Z C
. . . . . .

TSET1 is an SPC700 instruction that tests and sets memory bits using the accumulator. For every set bit in the accumulator, the corresponding memory bit is also set.

Syntax

TSET1 !abs

See Also

External Links

  1. Official Super Nintendo development manual on TSET1: Table C-18 in Appendix C-9 of Book I
  2. subparagraph 8.2.3.2 of page 3-8-8, lbid.