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CLC

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Revision as of 21:04, 23 July 2023 by Xetheria (talk | contribs) (→‎See Also: CLRC)
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Basic Info
Addressing Mode Opcode Length Speed
Implied (type 2) 18 1 byte 2 cycles
Flags Affected
N V M X D I Z C
. . . . . . . 0

CLC is a 65x instruction that clears the carry flag.

The 6502 lacks an add-without-carry instruction, so it is important to make sure the carry flag is clear before doing an ADC or else the sum will be one too great.

See Also

External Links