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PLD

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Revision as of 07:25, 9 December 2023 by Xetheria (talk | contribs) (low byte first)
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Basic Info
Addressing Mode Opcode Length Speed
Stack (Pull) 2B 1 byte 5 cycles
Flags Affected
N V M X D I Z C
. . . . . .

PLD (PulL Direct page) is a 65c816 instruction that pulls the 16-bit value at the top of the stack into the direct page register. The low byte of this register is pulled first.

See Also

External Links