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XCE

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Revision as of 11:52, 14 December 2023 by Xetheria (talk | contribs) (Two cycle Instructions)
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Basic Info
Addressing Mode Opcode Length Speed
Implied (type 2) FB 1 byte 2 cycles
Flags Affected
N V M X D I Z C E
. . . . .

XCE is an instruction that exchanges the carry and emulation bits. It typically appears soon after the Reset Vector following a CLC, to switch the S-CPU into 65c816 native mode.

See Also

External Links