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Control Register

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Revision as of 03:48, 17 December 2023 by Xetheria (talk | contribs) (bits cleared upon reset)

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The Control Register exists on the S-SMP and is 8 bits wide. It lives at 00F1h. Bits 0,1,2,4, and 5 are cleared upon reset.

See Also

Reference

page 3-4-1 of Book II of the official Super Nintendo development manual

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