LMULT (Super FX)

Basic Info
Addressing Mode	Opcode	Length	ROM Speed	RAM Speed	Cache Speed
Implied (type 1)	3D9F	2 bytes	10 or 14 cycles	10 or 14 cycles	5 or 9 cycles

Flags Affected
B	ALT1	ALT2	O/V	S	CY	Z
0	0	0	.

LMULT is a signed multiplication Super FX instruction. The factors are the source register and R₆. The exact speed depends on the state of the CFGR register.

LMULT utilizes the 8-bit multiplier four times.^[3]

LMULT shares its multiplication circuit with FMULT.

If R₄ is specified as the destination register, the product will be invalid.^[1]

Syntax

LMULT

See Also

• UMULT
• MULT
• Partial Product Buffer
• DIV2
• ALT1

External Links

1. Official Nintendo documentation on LMULT: 9.52 on page 2-9-73 of Book II
2. example: page 2-9-74 of Book II, lbid.
3. page 2-8-16 of Book II, lbid.