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ADC (SPC700): Difference between revisions
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{| class="wikitable" style="float:right;clear:right;width: | {| class="wikitable" style="float:right;clear:right;width:45%" | ||
!colspan="8"|Basic Info | !colspan="8"|Basic Info | ||
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| Line 7: | Line 7: | ||
|'''Speed''' | |'''Speed''' | ||
|+ | |+ | ||
| | |[[Immediate]] | ||
|88 | |88 | ||
|2 bytes | |2 bytes | ||
|2 cycles | |2 cycles | ||
|+ | |+ | ||
| | |[[Implied]] (type 1) | ||
|86 | |86 | ||
|1 byte | |1 byte | ||
|3 cycles | |3 cycles | ||
|+ | |+ | ||
| | |[[Direct Page Addressing | Direct Page]] | ||
|84 | |84 | ||
|2 bytes | |2 bytes | ||
|3 cycles | |3 cycles | ||
|+ | |+ | ||
| | |[[Direct Page Indexed by X]] | ||
|94 | |94 | ||
|2 bytes | |2 bytes | ||
|3 cycles | |3 cycles | ||
|+ | |+ | ||
| | |[[Absolute Addressing | Absolute]] | ||
|85 | |85 | ||
|3 bytes | |3 bytes | ||
|4 cycles | |4 cycles | ||
|+ | |+ | ||
| | |[[Absolute Indexed by X]] | ||
|95 | |95 | ||
|3 bytes | |3 bytes | ||
|5 cycles | |5 cycles | ||
|+ | |+ | ||
| | |[[Absolute Indexed by Y]] | ||
|96 | |96 | ||
|3 bytes | |3 bytes | ||
|5 cycles | |5 cycles | ||
|+ | |+ | ||
| | |[[Direct Page Indexed by X]] | ||
|87 | |87 | ||
|2 bytes | |2 bytes | ||
|6 cycles | |6 cycles | ||
|+ | |+ | ||
| | |[[Direct Page Indirect Indexed by Y]] | ||
|97 | |97 | ||
|2 bytes | |2 bytes | ||
|6 cycles | |6 cycles | ||
|+ | |+ | ||
| | |[[Implied]] (type 1) | ||
|99 | |99 | ||
|1 byte | |1 byte | ||
|5 cycles | |5 cycles | ||
|+ | |+ | ||
| | |[[Direct Page]] | ||
|89 | |89 | ||
|3 bytes | |3 bytes | ||
|6 cycles | |6 cycles | ||
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| | |[[Direct Page Immediate]] | ||
|98 | |98 | ||
|3 bytes | |3 bytes | ||
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{| class="wikitable" style="float:right;clear:right;width:30%" | {| class="wikitable" style="float:right;clear:right;width:30%" | ||
!colspan="8"|Flags | !colspan="8"|Flags Affected | ||
|+ | |+ | ||
|N | |[[Negative Flag|N]] | ||
|V | |[[Overflow Flag|V]] | ||
|P | |[[Direct Page Flag|P]] | ||
|B | |[[Break Flag|B]] | ||
|H | |[[Half-Carry Flag|H]] | ||
|I | |[[Interrupt Enable Flag|I]] | ||
|Z | |[[Zero Flag|Z]] | ||
|C | |[[Carry Flag|C]] | ||
|+ | |+ | ||
| | | | ||
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'''ADC''' (Add with Carry) is an [[SPC700]] instruction that adds the value of the two operands together (along with the [[carry flag]]) and stores the sum in the left operand. Often, the left operand is the accumulator. | '''ADC''' (Add with Carry) is an [[SPC700]] instruction that adds the value of the two operands together (along with the [[carry flag]]) and stores the sum in the left operand. Often, the left operand is the accumulator. | ||
The operands are stored in the instruction stream in the opposite order they appear in the assembler source. In the assembler source, the operand on the right is the source and the operand on the left is the destination. | |||
=== See Also === | === See Also === | ||
* [[SBC (SPC700)]] | * [[SBC (SPC700)]] | ||
* [[ADDW]] | |||
* [[ADC]] | * [[ADC]] | ||
=== External Links === | === External Links === | ||
* Official Super Nintendo development manual on ADC: [https://archive.org/details/SNESDevManual/book1/page/n230 Appendix C-5 of Book I] | * Official Super Nintendo development manual on ADC: Table C-7 in [https://archive.org/details/SNESDevManual/book1/page/n230 Appendix C-5 of Book I] | ||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category:SPC700]] | [[Category:SPC700]] | ||
[[Category:8-bit Arithmetic Operation Commands]] | [[Category:8-bit Arithmetic Operation Commands]] | ||
Latest revision as of 04:53, 27 November 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Immediate | 88 | 2 bytes | 2 cycles | ||||
| Implied (type 1) | 86 | 1 byte | 3 cycles | ||||
| Direct Page | 84 | 2 bytes | 3 cycles | ||||
| Direct Page Indexed by X | 94 | 2 bytes | 3 cycles | ||||
| Absolute | 85 | 3 bytes | 4 cycles | ||||
| Absolute Indexed by X | 95 | 3 bytes | 5 cycles | ||||
| Absolute Indexed by Y | 96 | 3 bytes | 5 cycles | ||||
| Direct Page Indexed by X | 87 | 2 bytes | 6 cycles | ||||
| Direct Page Indirect Indexed by Y | 97 | 2 bytes | 6 cycles | ||||
| Implied (type 1) | 99 | 1 byte | 5 cycles | ||||
| Direct Page | 89 | 3 bytes | 6 cycles | ||||
| Direct Page Immediate | 98 | 3 bytes | 5 cycles | ||||
| Flags Affected | |||||||
|---|---|---|---|---|---|---|---|
| N | V | P | B | H | I | Z | C |
| . | . | . | |||||
ADC (Add with Carry) is an SPC700 instruction that adds the value of the two operands together (along with the carry flag) and stores the sum in the left operand. Often, the left operand is the accumulator.
The operands are stored in the instruction stream in the opposite order they appear in the assembler source. In the assembler source, the operand on the right is the source and the operand on the left is the destination.
See Also
External Links
- Official Super Nintendo development manual on ADC: Table C-7 in Appendix C-5 of Book I