AND (Super FX): Difference between revisions

Latest revision as of 02:01, 19 December 2023


Basic Info
Addressing Mode	Opcode	Length	ROM Speed	RAM Speed	Cache Speed
Immediate	3E7n	2 bytes	6 cycles	6 cycles	2 cycles
Implied	7n	1 byte	3 cycles	3 cycles	1 cycle


Flags Affected
B	ALT1	ALT2	O/V	S	CY	Z
0	0	0	.		.

AND is a Super FX instruction that performs a logical AND on the source register and R_n. The conjunction is stored in the destination register. The operand may not be R₀.

External Links

Official Nintendo documentation on AND: Page 2-9-10 of Book II

@@ Line 1: / Line 1: @@
-'''AND''' is a [[Super FX]] instruction that performs a logical AND.
+{| class="wikitable" style="float:right;clear:right;width:60%"
-{| class="wikitable" style="float:right;clear:right;width:30%"
 !colspan="8"|Basic Info
 |+
@@ Line 11: / Line 9: @@
 |'''Cache Speed'''
 |+
-|immediate
+|[[Immediate]]
 |3E7n
 |2 bytes
@@ Line 18: / Line 16: @@
 |2 cycles
 |+
-|implied
+|[[Implied]]
 |7n
 |1 byte
@@ Line 30: / Line 28: @@
 |+
 |B
-|ALT1
+|[[ALT1]]
-|ALT2
+|[[ALT2]]
-|O/V
+|[[O/V]]
 |S
-|CY
+|[[CY]]
 |Z
 |+
@@ Line 45: / Line 43: @@
 |
 |}
+'''AND''' is a [[Super FX]] instruction that performs a logical AND on the [[source register]] and R<sub>n</sub>.  The conjunction is stored in the [[destination register]].  The operand may not be R<sub>0</sub>.
+=== See Also ===
+* [[OR (Super FX)]]
+* [[BIC (Super FX)]]
 === External Links ===
-* Official Nintendo documentation on AND: https://archive.org/details/SNESDevManual/book2/page/n166
+* Official Nintendo documentation on AND: [https://archive.org/details/SNESDevManual/book2/page/n166 Page 2-9-10 of Book II]
 [[Category:ASM]]
 [[Category:Super FX]]
 [[Category:Logical Operation Instructions]]