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BIT: Difference between revisions

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(see also AND)
 
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|+
|+
|Addressing Mode
|Addressing Mode
|N
|[[Negative Flag|N]]
|V
|[[Overflow Flag|V]]
|M
|[[M Flag|M]]
|X
|[[X Flag|X]]
|D
|[[Decimal Flag|D]]
|I
|[[I Flag|I]]
|Z
|[[Zero Flag|Z]]
|C
|[[Carry Flag|C]]
|+
|+
|[[Immediate]]
|[[Immediate]]
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'''BIT''' is a 65x instruction that performs a logical AND operation between the [[accumulator]] and memory without storing the conjunction.
'''BIT''' is a 65x instruction that performs a logical AND operation between the [[accumulator]] and memory without storing the conjunction.  If the conjunction is zero, the [[zero flag]] is set, otherwise it is cleared.
 
Except in [[immediate addressing]], the most significant bit of the data located at the effective address is moved into the [[negative flag]], and the second most significant bit of that data is moved into the [[overflow flag]].  BIT is often used right before a conditional branch instruction.


===== Cycle Penalties =====
===== Cycle Penalties =====
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=== See Also ===
=== See Also ===
* [[AND]]
* [[AND]]
* [[BPL]]
* [[BNE]]
* [[BCC]]
* [[BCS]]
* [[BVC]]
* [[BVS]]


=== External Links ===
=== External Links ===
* [[Eyes & Lichty]] page 431, on BIT: https://archive.org/details/0893037893ProgrammingThe65816/page/n457
* [[Eyes & Lichty]] page 431, on BIT: https://archive.org/details/0893037893ProgrammingThe65816/page/n457
* [[Labiak]] page on BIT: https://archive.org/details/Programming_the_65816/page/n131
* [[Labiak]] page 121 on BIT: https://archive.org/details/Programming_the_65816/page/n131
* [[MCS6500 Manual]] page on BIT: https://archive.org/details/mos_microcomputers_programming_manual/page/n62
* [[MCS6500 Manual]] page 47 on BIT: https://archive.org/details/mos_microcomputers_programming_manual/page/n62
* [[Carr]] page on BIT: https://archive.org/details/6502UsersManual/page/n262
* [[Carr]] page 249 on BIT: https://archive.org/details/6502UsersManual/page/n262
* [[Leventhal]] page on BIT: https://archive.org/details/6502-assembly-language-programming/page/n94
* [[Leventhal]] page 3-45 on BIT: https://archive.org/details/6502-assembly-language-programming/page/n94
* snes9x implementation of BIT: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L265
* snes9x implementation of BIT: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L265
* undisbeliever on BIT: https://undisbeliever.net/snesdev/65816-opcodes.html#bit-test-memory-bits-against-accumulator
* undisbeliever on BIT: https://undisbeliever.net/snesdev/65816-opcodes.html#bit-test-memory-bits-against-accumulator

Latest revision as of 04:50, 6 December 2023

Basic Info
Addressing Mode Opcode Length Speed
Immediate 89 2 bytes* 2 cycles*
Absolute 2C 3 bytes 4 cycles*
Direct Page 24 2 bytes 3 cycles*
absolute indexed X 3C 3 bytes 4 cycles*
direct page indexed X 34 2 bytes 4 cycles*
Flags Affected
Addressing Mode N V M X D I Z C
Immediate . . . . . . .
other . . . . .

BIT is a 65x instruction that performs a logical AND operation between the accumulator and memory without storing the conjunction. If the conjunction is zero, the zero flag is set, otherwise it is cleared.

Except in immediate addressing, the most significant bit of the data located at the effective address is moved into the negative flag, and the second most significant bit of that data is moved into the overflow flag. BIT is often used right before a conditional branch instruction.

Cycle Penalties

See Also

External Links

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