We've just updated MediaWiki and its underlying software. If anything doesn't look or work quite right, please mention it to us. --RanAS

BIT: Difference between revisions

From SnesLab
Jump to: navigation, search
(added undisbeliever's opcode page link)
 
(16 intermediate revisions by the same user not shown)
Line 1: Line 1:
'''BIT''' is a 65x instruction that performs a logical AND operation between the [[accumulator]] and memory without storing the conjunction.
{| class="wikitable" style="float:right;clear:right;width:40%"
 
{| class="wikitable" style="float:right;clear:right;width:30%"
!colspan="8"|Basic Info
!colspan="8"|Basic Info
|+
|+
Line 9: Line 7:
|'''Speed'''
|'''Speed'''
|+
|+
|immediate
|[[Immediate]]
|89
|89
|2 bytes
|2 bytes*
|2 cycles
|2 cycles*
|+
|+
|absolute
|[[Absolute]]
|2C
|2C
|3 bytes
|3 bytes
|4 cycles
|4 cycles*
|+
|+
|direct page
|[[Direct Page Addressing|Direct Page]]
|24
|24
|2 bytes
|2 bytes
|3 cycles
|3 cycles*
|+
|+
|absolute indexed X
|absolute indexed X
|3C
|3C
|3 bytes
|3 bytes
|4 cycles
|4 cycles*
|+
|+
|direct page indexed X
|direct page indexed X
|34
|34
|2 bytes
|2 bytes
|4 cycles
|4 cycles*
|}
|}


{| class="wikitable" style="float:right;clear:right;width:30%"
{| class="wikitable" style="float:right;clear:right;width:30%"
!colspan="9"|Flags Clobbered
!colspan="9"|Flags Affected
|+
|Addressing Mode
|[[Negative Flag|N]]
|[[Overflow Flag|V]]
|[[M Flag|M]]
|[[X Flag|X]]
|[[Decimal Flag|D]]
|[[I Flag|I]]
|[[Zero Flag|Z]]
|[[Carry Flag|C]]
|+
|+
|N
|[[Immediate]]
|V
|.
|M
|.
|X
|.
|D
|.
|I
|.
|Z
|.
|C
|
|.
|+
|+
|other
|
|
|
|
Line 56: Line 66:
|.
|.
|}
|}
'''BIT''' is a 65x instruction that performs a logical AND operation between the [[accumulator]] and memory without storing the conjunction.  If the conjunction is zero, the [[zero flag]] is set, otherwise it is cleared.
Except in [[immediate addressing]], the most significant bit of the data located at the effective address is moved into the [[negative flag]], and the second most significant bit of that data is moved into the [[overflow flag]].  BIT is often used right before a conditional branch instruction.
===== Cycle Penalties =====
* BIT takes an extra cycle when the accumulator is 16 bits wide, in all [[addressing modes]]
* In direct page addressing modes, BIT takes an extra cycle when the low byte of the [[direct page register]] is nonzero
* In [[Absolute Indexed, X Addressing]], BIT takes an extra cycle when adding the index crosses a page boundary
=== See Also ===
* [[AND]]
* [[BPL]]
* [[BNE]]
* [[BCC]]
* [[BCS]]
* [[BVC]]
* [[BVS]]


=== External Links ===
=== External Links ===
* [[Eyes & Lichty]] page on BIT: https://archive.org/details/0893037893ProgrammingThe65816/page/n457
* [[Eyes & Lichty]] page 431, on BIT: https://archive.org/details/0893037893ProgrammingThe65816/page/n457
* [[Labiak]] page on BIT: https://archive.org/details/Programming_the_65816/page/n131
* [[Labiak]] page 121 on BIT: https://archive.org/details/Programming_the_65816/page/n131
* [[MCS6500 Manual]] page on BIT: https://archive.org/details/mos_microcomputers_programming_manual/page/n62
* [[MCS6500 Manual]] page 47 on BIT: https://archive.org/details/mos_microcomputers_programming_manual/page/n62
* [[Carr]] page on BIT: https://archive.org/details/6502UsersManual/page/n262
* [[Carr]] page 249 on BIT: https://archive.org/details/6502UsersManual/page/n262
* [[Leventhal]] page on BIT: https://archive.org/details/6502-assembly-language-programming/page/n94
* [[Leventhal]] page 3-45 on BIT: https://archive.org/details/6502-assembly-language-programming/page/n94
* snes9x implementation of BIT: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L265
* snes9x implementation of BIT: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L265
* undisbeliever on BIT: https://undisbeliever.net/snesdev/65816-opcodes.html#bit-test-memory-bits-against-accumulator
* undisbeliever on BIT: https://undisbeliever.net/snesdev/65816-opcodes.html#bit-test-memory-bits-against-accumulator

Latest revision as of 04:50, 6 December 2023

Basic Info
Addressing Mode Opcode Length Speed
Immediate 89 2 bytes* 2 cycles*
Absolute 2C 3 bytes 4 cycles*
Direct Page 24 2 bytes 3 cycles*
absolute indexed X 3C 3 bytes 4 cycles*
direct page indexed X 34 2 bytes 4 cycles*
Flags Affected
Addressing Mode N V M X D I Z C
Immediate . . . . . . .
other . . . . .

BIT is a 65x instruction that performs a logical AND operation between the accumulator and memory without storing the conjunction. If the conjunction is zero, the zero flag is set, otherwise it is cleared.

Except in immediate addressing, the most significant bit of the data located at the effective address is moved into the negative flag, and the second most significant bit of that data is moved into the overflow flag. BIT is often used right before a conditional branch instruction.

Cycle Penalties

See Also

External Links