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CMP (SPC700): Difference between revisions
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!colspan="8"|Basic Info | !colspan="8"|Basic Info | ||
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|2 cycles | |2 cycles | ||
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| | |[[Implied Indirect]] (type 1) | ||
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|5 cycles | |5 cycles | ||
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| | |[[Direct Page Indexed Indirect by X]] | ||
|67 | |67 | ||
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|6 cycles | |6 cycles | ||
|+ | |+ | ||
| | |[[Direct Page Indirect Indexed by Y]] | ||
|77 | |77 | ||
|2 bytes | |2 bytes | ||
|6 cycles | |6 cycles | ||
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| | |[[Implied Indirect]] (type 1) | ||
|79 | |79 | ||
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!colspan="8"|Flags Affected | !colspan="8"|Flags Affected | ||
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|N | |[[Negative Flag|N]] | ||
|V | |[[Overflow Flag|V]] | ||
|P | |[[Direct Page Flag|P]] | ||
|B | |[[Break Flag|B]] | ||
|H | |[[Half-Carry Flag|H]] | ||
|I | |[[Interrupt Enable Flag|I]] | ||
|Z | |[[Zero Flag|Z]] | ||
|C | |[[Carry Flag|C]] | ||
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'''CMP''' is an [[SPC700]] instruction that compares two operands. The right operand is subtracted from the left operand, but the difference is not stored anywhere - the side effect is the N, Z, and C flags being modified. | '''CMP''' is an [[SPC700]] instruction that compares two operands. The right operand is subtracted from the left operand, but the difference is not stored anywhere - the side effect is the N, Z, and C flags being modified. | ||
The operands are stored in the instruction stream in the opposite order they appear in the assembler source. In the assembler source, the operand on the right is the source and the operand on the left is the destination. | |||
=== See Also === | === See Also === | ||
* [[CMPW]] | * [[CMPW]] | ||
* [[CMP]] | * [[CMP]] | ||
* [[CMP (Super FX)]] | |||
=== External Links === | === External Links === | ||
* Official Super Nintendo development manual on CMP: [https://archive.org/details/SNESDevManual/book1/page/n230 Appendix C-5 of Book I] | * Official Super Nintendo development manual on CMP: Table C-7 in [https://archive.org/details/SNESDevManual/book1/page/n230 Appendix C-5 of Book I] | ||
[[Category:ASM]] | [[Category:ASM]] | ||
[[Category:SPC700]] | [[Category:SPC700]] | ||
[[Category:8-bit Arithmetic Operation Commands]] | [[Category:8-bit Arithmetic Operation Commands]] | ||
Latest revision as of 02:12, 19 December 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Immediate | 68 | 2 bytes | 2 cycles | ||||
| Implied Indirect (type 1) | 66 | 1 bytes | 3 cycles | ||||
| Direct Page | 64 | 2 bytes | 3 cycles | ||||
| Direct Page Indexed by X | 74 | 2 bytes | 4 cycles | ||||
| Absolute | 65 | 3 bytes | 4 cycles | ||||
| Absolute Indexed by X | 75 | 3 bytes | 5 cycles | ||||
| Absolute Indexed by Y | 76 | 3 bytes | 5 cycles | ||||
| Direct Page Indexed Indirect by X | 67 | 2 byte | 6 cycles | ||||
| Direct Page Indirect Indexed by Y | 77 | 2 bytes | 6 cycles | ||||
| Implied Indirect (type 1) | 79 | 1 bytes | 5 cycles | ||||
| Direct Page | 69 | 3 bytes | 6 cycles | ||||
| Direct Page Immediate | 78 | 3 bytes | 5 cycles | ||||
| Immediate | C8 | 2 bytes | 2 cycles | ||||
| Direct Page | 3E | 2 bytes | 3 cycles | ||||
| Absolute | 1E | 3 bytes | 4 cycles | ||||
| Immediate | AD | 2 bytes | 2 cycles | ||||
| Direct Page | 7E | 2 bytes | 3 cycles | ||||
| Absolute | 5E | 3 bytes | 4 cycles | ||||
| Flags Affected | |||||||
|---|---|---|---|---|---|---|---|
| N | V | P | B | H | I | Z | C |
| . | . | . | . | . | |||
CMP is an SPC700 instruction that compares two operands. The right operand is subtracted from the left operand, but the difference is not stored anywhere - the side effect is the N, Z, and C flags being modified.
The operands are stored in the instruction stream in the opposite order they appear in the assembler source. In the assembler source, the operand on the right is the source and the operand on the left is the destination.
See Also
External Links
- Official Super Nintendo development manual on CMP: Table C-7 in Appendix C-5 of Book I