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LDY: Difference between revisions

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(clobbered -> affected)
(dp alignment penalty)
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|A0
|A0
|2 bytes
|2 bytes
|2 cycles
|2 cycles*
|+
|+
|absolute
|absolute
|AC
|AC
|3 bytes
|3 bytes
|4 cycles
|4 cycles*
|+
|+
|direct page
|direct page
|A4
|A4
|2 bytes
|2 bytes
|3 cycles
|3 cycles*
|+
|+
|absolute indexed X
|absolute indexed X
|BC
|BC
|3 bytes
|3 bytes
|4 cycles
|4 cycles*
|+
|+
|direct page indexed X
|direct page indexed X
|B4
|B4
|2 bytes
|2 bytes
|4 cycles
|4 cycles*
|}
|}


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'''LDY''' (Load Y) is a 65x instruction that loads the [[Y index register]].
'''LDY''' (Load Y) is a 65x instruction that loads the [[Y index register]].  In [[direct page addressing]] modes, LDY takes another extra cycle if the low byte of the [[direct page register]] is nonzero.


=== See Also ===
=== See Also ===

Revision as of 01:18, 20 November 2023

Basic Info
Addressing Mode Opcode Length Speed
immediate A0 2 bytes 2 cycles*
absolute AC 3 bytes 4 cycles*
direct page A4 2 bytes 3 cycles*
absolute indexed X BC 3 bytes 4 cycles*
direct page indexed X B4 2 bytes 4 cycles*
Flags Affected
N V M X D I Z C
. . . . . .

LDY (Load Y) is a 65x instruction that loads the Y index register. In direct page addressing modes, LDY takes another extra cycle if the low byte of the direct page register is nonzero.

See Also

External Links

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