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LSR (SPC700): Difference between revisions
From SnesLab
(LSR is a divide by two) |
(clobbered -> affected) |
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|'''Speed''' | |'''Speed''' | ||
|+ | |+ | ||
| | |[[Accumulator Addressing | Accumulator]] | ||
|5C | |5C | ||
|1 byte | |1 byte | ||
|2 cycles | |2 cycles | ||
|+ | |+ | ||
| | |[[Direct Page Addressing | Direct Page]] | ||
|4B | |4B | ||
|2 bytes | |2 bytes | ||
|4 cycles | |4 cycles | ||
|+ | |+ | ||
| | |[[Direct Page Indexed by X]] | ||
|5B | |5B | ||
|2 bytes | |2 bytes | ||
|5 cycles | |5 cycles | ||
|+ | |+ | ||
| | |[[Absolute Addressing | Absolute]] | ||
|4C | |4C | ||
|3 bytes | |3 bytes | ||
| Line 29: | Line 29: | ||
{| class="wikitable" style="float:right;clear:right;width:30%" | {| class="wikitable" style="float:right;clear:right;width:30%" | ||
!colspan="8"|Flags | !colspan="8"|Flags Affected | ||
|+ | |+ | ||
|N | |[[Negative Flag|N]] | ||
|V | |[[Overflow Flag|V]] | ||
|P | |[[Direct Page Flag|P]] | ||
|B | |[[Break Flag|B]] | ||
|H | |[[Half-Carry Flag|H]] | ||
|I | |[[Interrupt Enable Flag|I]] | ||
|Z | |[[Zero Flag|Z]] | ||
|C | |[[Carry Flag|C]] | ||
|+ | |+ | ||
| | | | ||
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'''LSR''' (Logical Shift Right) is an [[SPC700]] instruction that shifts its operand one bit to the right, dividing it by two. The least significant bit is shifted into the [[carry flag]]. A zero is shifted into the most significant bit. | '''LSR''' (Logical Shift Right) is an [[SPC700]] instruction that shifts its operand one bit to the right, dividing it by two. The least significant bit is shifted into the [[carry flag]]. A zero is shifted into the most significant bit. | ||
The official manual has the bit shift operators for LSR pointing the wrong way. | |||
=== See Also === | === See Also === | ||
Latest revision as of 05:02, 27 November 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| Accumulator | 5C | 1 byte | 2 cycles | ||||
| Direct Page | 4B | 2 bytes | 4 cycles | ||||
| Direct Page Indexed by X | 5B | 2 bytes | 5 cycles | ||||
| Absolute | 4C | 3 bytes | 5 cycles | ||||
| Flags Affected | |||||||
|---|---|---|---|---|---|---|---|
| N | V | P | B | H | I | Z | C |
| . | . | . | . | . | |||
LSR (Logical Shift Right) is an SPC700 instruction that shifts its operand one bit to the right, dividing it by two. The least significant bit is shifted into the carry flag. A zero is shifted into the most significant bit.
The official manual has the bit shift operators for LSR pointing the wrong way.
See Also
External Links
- Official Super Nintendo development manual on LSR: Appendix C-7 of Book I