Accumulator Addressing

There are six instructions that support Accumulator Addressing on the 65c816:

• ASL (opcode 0A)
• DEC (opcode 3A)
• INC (opcode 1A)
• LSR (opcode 4A)
• ROL (opcode 2A)
• ROR (opcode 6A)

They all are one byte long. None of them write to or read from external memory. They are all read-modify-write instructions.

In this admode, the accumulator is the operand.^[3] In native mode when the m flag is clear, the accumulator is 16 bits wide. Otherwise it is 8 bit (when m is set or in emulation mode).

Syntax

ROR
RORA
ROR A

Interestingly, XBA is not considered to use accumulator addressing, perhaps because when the high B byte is hidden it is not a proper accumulator and other instructions do not operate on it. Less surprisingly, neither are the transfer instructions which include the accumulator as an operand. But XCN on the SPC700 is considered to use accumulator addressing; it does not operate on any other data.

See Also

• Implied Addressing
• Immediate Addressing

References

1. Eyes & Lichty, page 387
2. page 126, lbid
3. section 3.5.8 of 65c816 datasheet, https://westerndesigncenter.com/wdc/documentation/w65c816s.pdf
4. Clark, Bruce. http://www.6502.org/tutorials/65c816opcodes.html#5.6