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NOT1 (SPC700): Difference between revisions

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(→‎External Links: applicable memory location)
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|'''Speed'''
|'''Speed'''
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* [[AND1]]
* [[AND1]]
* [[EOR1]]
* [[EOR1]]
* [[MOV1]]


=== External Links ===
=== External Links ===
* Official Nintendo documentation on NOT1: Table C-18 in [https://archive.org/details/SNESDevManual/book1/page/n234 Appendix C-9 of Book I]
* Official Nintendo documentation on NOT1: Table C-18 in [https://archive.org/details/SNESDevManual/book1/page/n234 Appendix C-9 of Book I]
* https://archive.org/details/SNESDevManual/book1/page/n186
* subparagraph 8.2.3.3 of [https://archive.org/details/SNESDevManual/book1/page/n186 page 3-8-8], lbid.


[[Category:ASM]]
[[Category:ASM]]

Latest revision as of 14:14, 29 December 2023

Basic Info
Addressing Mode Opcode Length Speed
Absolute Boolean Bit EA 3 byte 5 cycles
Flags Affected
N V P B H I Z C
. . . . . . . .

NOT1 is an SPC700 instruction that performs a complement of a bit. The low 13 bits of the operand specify an absolute address. The high 3 bits of the operand specify which bit at that absolute address.

See Also

External Links