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OR1 (SPC700): Difference between revisions
From SnesLab
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* [[AND1]] | * [[AND1]] | ||
* [[EOR1]] | * [[EOR1]] | ||
* [[MOV1]] | |||
=== External Links === | === External Links === | ||
Revision as of 06:36, 23 July 2023
| Basic Info | |||||||
|---|---|---|---|---|---|---|---|
| Addressing Mode | Opcode | Length | Speed | ||||
| 0A | 3 bytes | 5 cycles | |||||
| 2A | 3 bytes | 5 cycles | |||||
| Flags Clobbered | |||||||
|---|---|---|---|---|---|---|---|
| N | V | P | B | H | I | Z | C |
| . | . | . | . | . | . | . | |
OR1 is an SPC700 instruction that performs a logical or between a memory bit and the carry flag, then stores the disjunction in the carry flag.
See Also
External Links
- Official Super Nintendo development manual on OR1: Appendix C-9 of Book I