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ROR: Difference between revisions

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* [[MCS6500 Manual]] page on ROR: https://archive.org/details/mos_microcomputers_programming_manual/page/n171
* [[MCS6500 Manual]] page on ROR: https://archive.org/details/mos_microcomputers_programming_manual/page/n171
* [[Carr]] page on ROR: https://archive.org/details/6502UsersManual/page/n282
* [[Carr]] page on ROR: https://archive.org/details/6502UsersManual/page/n282
* [[Leventhal]] page on ROR: https://archive.org/details/6502-assembly-language-programming/page/n136
* [[Leventhal]] page 3-87 on ROR: https://archive.org/details/6502-assembly-language-programming/page/n136
* snes9x implementation of ROR: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1070
* snes9x implementation of ROR: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1070
* undisbeliever on ROR: https://undisbeliever.net/snesdev/65816-opcodes.html#ror-rotate-right
* undisbeliever on ROR: https://undisbeliever.net/snesdev/65816-opcodes.html#ror-rotate-right

Revision as of 03:00, 5 December 2023

Basic Info
Addressing Mode Opcode Length Speed
Accumulator 6A 1 byte 2 cycles
Absolute 6E 3 bytes 6 cycles*
Direct Page 66 2 bytes 5 cycles*
absolute indexed by X 7E 3 bytes 7 cycles*
direct page indexed by X 76 2 bytes 6 cycles*
Flags Affected
N V M X D I Z C
. . . . .

ROR (Rotate Right) is a 65x instruction that rotates a value and the carry flag right one bit. The least significant bit is shifted into the carry flag. The carry flag is shifted into the most significant bit.

Cycle Penalties

See Also

External Links