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ROR: Difference between revisions

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'''ROR''' (Rotate Right) is a 65x instruction that rotates a value and the [[carry flag]] right one bit.  The least significant bit is shifted into the carry flag.  The carry flag is shifted into the most significant bit.
{| class="wikitable" style="float:right;clear:right;width:40%"
 
{| class="wikitable" style="float:right;clear:right;width:30%"
!colspan="8"|Basic Info
!colspan="8"|Basic Info
|+
|+
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|'''Speed'''
|'''Speed'''
|+
|+
|accumulator
|[[Accumulator Addressing|Accumulator]]
|6A
|6A
|1 byte
|1 byte
|2 cycles
|2 cycles
|+
|+
|absolute
|[[Absolute]]
|6E
|6E
|3 bytes
|3 bytes
|6 cycles
|6 cycles*
|+
|+
|direct page
|[[Direct Page Addressing|Direct Page]]
|66
|66
|2 bytes
|2 bytes
|5 cycles
|5 cycles*
|+
|+
|absolute indexed by X
|absolute indexed by X
|7E
|7E
|3 bytes
|3 bytes
|7 cycles
|7 cycles*
|+
|+
|direct page indexed by X
|direct page indexed by X
|76
|76
|2 bytes
|2 bytes
|6 cycles
|6 cycles*
|}
|}


{| class="wikitable" style="float:right;clear:right;width:30%"
{| class="wikitable" style="float:right;clear:right;width:30%"
!colspan="9"|Flags Clobbered
!colspan="9"|Flags Affected
|+
|+
|N
|[[N Flag|N]]
|V
|[[V Flag|V]]
|M
|[[M Flag|M]]
|X
|[[X Flag|X]]
|D
|[[D Flag|D]]
|I
|[[I Flag|I]]
|Z
|[[Z Flag|Z]]
|C
|[[C Flag|C]]
|+
|+
|
|
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|
|}
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'''ROR''' (Rotate Right) is a 65x instruction that rotates a value and the [[carry flag]] right one bit.  The least significant bit is shifted into the carry flag.  The carry flag is shifted into the most significant bit. 
===== Cycle Penalties =====
* Except in [[accumulator addressing]], ROR takes two extra cycles when the accumulator is 16 bits wide.
* In [[direct page addressing]] modes, ROR takes another extra cycle if the low byte of the [[direct page register]] is nonzero.


=== See Also ===
=== See Also ===
* [[ROL]]
* [[ROL]]
* [[ROR (SPC700)]]
* [[ROR (Super FX)]]


=== External Links ===
=== External Links ===
* [[Eyes & Lichty]] page on ROR: https://archive.org/details/0893037893ProgrammingThe65816/page/n517
* [[Eyes & Lichty]] page 491, on ROR: https://archive.org/details/0893037893ProgrammingThe65816/page/n517
* [[Labiak]] page on ROR: https://archive.org/details/Programming_the_65816/page/n185
* lbid, page 191, before & after diagram on ROR: https://archive.org/details/0893037893ProgrammingThe65816/page/n217
* [[MCS6500 Manual]] page on ROR: https://archive.org/details/mos_microcomputers_programming_manual/page/n171
* [[Labiak]] page 175 on ROR: https://archive.org/details/Programming_the_65816/page/n185
* [[Carr]] page on ROR: https://archive.org/details/6502UsersManual/page/n282
* [[MCS6500 Manual]] page 150 on ROR: https://archive.org/details/mos_microcomputers_programming_manual/page/n171
* [[Leventhal]] page on ROR: https://archive.org/details/6502-assembly-language-programming/page/n136
* [[Carr]] page 269 on ROR: https://archive.org/details/6502UsersManual/page/n282
* [[Leventhal]] page 3-87 on ROR: https://archive.org/details/6502-assembly-language-programming/page/n136
* snes9x implementation of ROR: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1070
* snes9x implementation of ROR: https://github.com/snes9xgit/snes9x/blob/master/cpuops.cpp#L1070
* undisbeliever on ROR: https://undisbeliever.net/snesdev/65816-opcodes.html#ror-rotate-right


[[Category:ASM]]
[[Category:ASM]]

Latest revision as of 19:24, 8 January 2024

Basic Info
Addressing Mode Opcode Length Speed
Accumulator 6A 1 byte 2 cycles
Absolute 6E 3 bytes 6 cycles*
Direct Page 66 2 bytes 5 cycles*
absolute indexed by X 7E 3 bytes 7 cycles*
direct page indexed by X 76 2 bytes 6 cycles*
Flags Affected
N V M X D I Z C
. . . . .

ROR (Rotate Right) is a 65x instruction that rotates a value and the carry flag right one bit. The least significant bit is shifted into the carry flag. The carry flag is shifted into the most significant bit.

Cycle Penalties

See Also

External Links